HKSTP announces the launch of the Student Internship Programme (SIP) 2026, which has been open for applications since mid-May 2026.-SIP 2026 is designed to equip students with essential skillsets, industry exposure, and professional networks, supporting their transition into the innovation and technology (I&amp;T) sector upon graduation. The programme also enables companies to engage early with emerging talent and contribute to workforce development.-Eligible HKSTP partner companies can receive funding support to employ qualified student interns, providing students with meaningful, hands-on experience in real-world business environments.-*Please note that funding support is allocated on a&nbsp;first-come, first-served basis.-For further details, please feel free to contact TecONE at 2629 2383 or sip@hkstp.org.

HKSTP Student Internship Programme 2026

Blooming with AI: HKSTP Summer Talent Fest 2026

HKSTP Global Internship 2026

HYAB Youth Start-up Internship Programme (YSIP)

“AI for All” Inclusive Programme - Talent Foundry

About the RoleWe are seeking an AI R&amp;D Lead to drive the research and development of core AI technologies that power our solutions — spanning AI characters, 3D avatars, education and elderly companions, interactive panels, virtual applications, and consultancy services.Key Responsibilities<ol><li>Lead R&amp;D of core AI technologies, including machine learning, deep learning, LLM training and deployment, and AI system architecture.</li><li>Drive innovation in conversational AI (personality, voice, memory) and 3D character development (rigging, animation, optimization).</li><li>Explore AI applications in education, elderly care, museums, retail, offices, and campuses; design end-to-end solutions and drive deployment.</li><li>Lead development of AI platforms and tools, covering data governance, model training, inference acceleration, and automated evaluation.</li><li>Collaborate across teams and advance industry partnerships, open-source contributions, publications, and patents.</li><li>Complete other tasks assigned by leadership.</li></ol>Qualifications<ol><li>Bachelor's degree or above in computer science, mathematics, statistics, AI, data science, or related fields.</li><li>Solid foundation in machine learning and deep learning; familiar with mainstream models (CNN/RNN/Transformer/GAN, etc.).</li><li>Proficient in TensorFlow/PyTorch and Python/C++; experience in distributed training, model compression, or edge-device inference.</li><li>Experience in conversational AI, 3D graphics, or vertical domains (education, elderly care, retail, etc.) is a plus.</li></ol>What We Offer<ul><li>Work at the forefront of AI research and commercial deployment.</li><li>Collaborative, cross-disciplinary team spanning AI, 3D graphics, hardware, and virtual applications.</li><li>Competitive salary and performance bonus</li><li>Medical &amp; dental benefits</li><li>Flexible working hours and supportive startup culture</li><li>Equity / stock options (for strong contributors)</li></ul>

AI R&D  Lead

Role SummaryWe are looking for a detail-oriented, organized and client-friendly Business Development &amp; Commercial Operations Executive to support the commercial growth of Datago’s financial data business.This is a junior-to-mid-level role suitable for fresh graduates or candidates with early-stage experience in business development, client service, sales support, operations, legal administration or financial services.You will work closely with senior management to support client and partner engagement, follow up on assigned business leads, prepare product and commercial materials, coordinate meetings and track agreed action items. You will also assist with the preparation, review coordination and administration of commercial agreements, including NDAs, data trial agreements and data subscription agreements.This is not primarily a cold-calling or hunter sales role. However, the successful candidate should be comfortable communicating with professional clients, following up opportunities in a timely manner, and helping move commercial discussions forward in a structured way.Responsibilities<ul><li>Follow up on assigned client, partner, and inbound business leads; prepare and send relevant product and commercial materials.</li><li>Support client and partner meetings by preparing materials, taking meeting notes, and ensuring agreed action items are followed up.</li><li>Assist with product demonstrations, data trials, client onboarding, renewals, and general client communication.</li><li>Prepare and coordinate commercial documents, including NDAs, data trial agreements, and subscription agreements, using approved templates; track reviews, approvals, and signatures.</li><li>Maintain accurate CRM records, including client details, opportunities, follow-up actions, and contract/renewal status.</li><li>Coordinate with internal teams and external legal counsel to support smooth commercial delivery and escalate non-standard requests when needed.</li></ul>Requirements <ul><li>Bachelor’s degree; fresh graduates and candidates with early-stage relevant experience are welcome.</li><li>Fluent in written and spoken English and Chinese (Mandarin required); Cantonese is a strong advantage.</li><li>Detail-oriented, organized, patient, and able to manage multiple follow-up items reliably.</li><li>Strong communication and writing skills; comfortable interacting with clients, partners, and internal teams.</li><li>Professional, client-friendly, and proactive in following up assigned leads and action items.</li><li>Good judgement in handling confidential information and escalating non-standard commercial or contractual matters when needed.</li><li>Interest in financial markets, financial data, AI, technology, or institutional clients.</li></ul>Preferred Qualifications<ul><li>Experience in client service, sales/BD support, commercial operations, contract administration, financial services, SaaS, or technology.</li><li>Exposure to commercial documents such as NDAs, trial agreements, subscription agreements, quotations, or proposals.</li><li>Familiarity with CRM systems such as Salesforce, HubSpot and Zoho, Microsoft Office, and AI productivity tools.</li><li>Basic understanding of financial data products, SaaS subscriptions, datasets, or data-delivery processes.</li></ul>Location of work<ul><li>Hong Kong</li></ul>Benefits<ul><li>Competitive base salary and performance bonus</li><li>Annual leave and group medical insurance</li><li>Direct exposure to top tier institutional clients, including hedge funds, asset managers, and universities</li><li>Opportunity to develop commercial, financial data, client management, and contract coordination skills within a fast-growing FinTech company</li><li>Close mentorship and direct collaboration with senior management</li><li>Support for IANG visa applications, where applicable</li><li>Unlimited office snacks and beverages</li></ul>Other: Fresh graduates are welcome.

Business Development & Commercial Operations Executive

-Conduct Hands-On Cloud Research &amp; Experimentation: Design, prototype, and evaluate advanced cloud-native architectures, distributed systems, and emerging cloud technologies through rigorous technical experimentation and proof-of-concept (PoC) implementations.-Drive Technical Feasibility &amp; R&amp;D Initiatives: Lead deep-dive feasibility studies and technical benchmarking for complex cloud initiatives, directly contributing code, architectures, and experimental models across all research stages.-Pioneer Technical Innovation: Investigate cutting-edge cloud paradigms (such as serverless computing, edge-cloud integration, multi-cloud optimization, or container orchestration) and translate theoretical concepts into practical, scalable R&amp;D solutions.-Collaborate &amp; Guide Technical Execution: Work closely with cross-functional teams to integrate research outcomes into practical project pipelines while providing technical guidance and mentoring team members on best practices.

Project Engineer

<ul><li>Design and develop end-to-end systems across mobile applications (iOS &amp; Android), backend services, APIs, and data layers</li><li>Take ownership of system architecture, including component boundaries, data flow, and client–server responsibilities</li><li>Collaborate with cross-functional teams to translate real-world operational and research requirements into scalable technical solutions</li><li>Build and maintain backend services and integrations supporting LocoBikeʼs core mobility and operations platforms</li><li>Work closely with mobile apps, understanding performance, latency, reliability, and real-world usage constraints</li><li>Use Python to support R&amp;D activities, including: </li></ul><ol><li>Data processing and analysis </li><li>Algorithm prototyping and experimentation </li><li>Supporting research validation and technical documentation </li></ol><ul><li>Leverage AI coding agents to accelerate development while: </li></ul><ol><li>Clearly defining problems and constraints </li><li>Critically reviewing and validating generated code </li><li>Ensuring correctness, performance, and maintainability </li></ol><ul><li>Review AI-assisted outputs with a strong verification mindset, considering edge cases, failure modes, and long-term implications</li><li>Continuously improve system design, code quality, and development workflows Education &amp; Experience Bachelorʼs degree or above in Computer Science, Engineering, Data Science, or a related discipline; Masterʼs degree or PhD preferred.</li></ul>

R&D Engineer

Job Description:<ol><li>Organize reviews of overall system solutions, lead cross-functional teams to conduct technical demonstrations and tackle key technical challenges. Deliver complete overall technical plans and system outline design documents.</li><li>Take charge of overall system architecture design. Sort out system topology, interface relations, data flow and control logic, and produce system architecture diagrams, interface specifications and overall design documents.</li><li>Define functional and performance indicators for each subsystem, and organize teams to complete corresponding R&amp;D tasks.</li><li>Formulate unified technical specifications and design standards for the whole system, standardize the development rules of each subsystem to guarantee system compatibility and scalability.</li></ol>Job Requirements:<ol><li>Master’s degree or above from QS Top 100 universities, majoring in Mechanical Engineering, Automation, Electronics, Robotics, Computer Science or other related engineering disciplines.</li><li>Over 10 years of working experience in the robotics industry. Proven experience in the R&amp;D and application of various robots and automation products, including but not limited to robotic arms, mobile robots and industrial automation systems.</li><li>Candidates with national or international Olympiad competition awards are preferred.</li><li>Candidates with experience managing R&amp;D teams or serving as Key R&amp;D personnel are preferred.</li><li>Strong innovative thinking and team spirit. Possess excellent teamwork, communication skills, sense of responsibility and self-motivation, as well as outstanding learning agility.</li></ol>

高級系統工程師Senior System Engineer

Responsibilities 1. AI Agent development: build AI agents and tool calling with Mastra and the Vercel AI SDK. 2. AI generation: develop image, video and text generation features, orchestrating background jobs with Trigger.dev. 3. AI quality and cost: own model evaluation, tracing, and model selection across providers (OpenAI / Anthropic / Google). 4. Full‑stack development: ship frontend and backend features with Next.js, Supabase, shadcn/ui and TailwindCSS. 5. Engineering productivity: use AI coding tools such as Claude Code and Codex to keep raising development speed and quality.Requirements 1. Strong full‑stack fundamentals: expert in TypeScript, React and Next.js (App Router / Server Components / Server Actions); able to take a feature from design to production on your own. 2. Hands‑on LLM application experience: shipped a real project with at least one of Vercel AI SDK / Mastra / LangChain / OpenAI SDK; understand prompt design, tool calling, streaming and structured output. 3. Solid PostgreSQL schema design and SQL; experience with Supabase or a similar BaaS. 4. Heavy user of AI coding tools who reviews and verifies AI‑generated code and owns the final quality. 5. Fluent English reading; good communicator with strong ownership and self‑drive; writes clear technical docs.Nice to have 1. Experience with agent memory, RAG / vector search (pgvector, embeddings, rerank) or multi‑agent systems. 2. Built LLM evaluation (evals, LLM‑as‑judge) or production AI observability (traces, cost and latency analysis). 3. Worked on image / video generation products, or media processing with tools like ffmpeg. 4. Deployed on Vercel, Cloudflare Workers or Google Cloud; used Trigger.dev or a similar background job framework. 5. Built SaaS products (Clerk auth, Stripe subscription billing, i18n), or know hardware, manufacturing or supply chains.

AI Full-Stack Engineer (Next.js / AI Agent)

You will work on the core pipeline of the A2A Network multi-agent system — from agent registration and tool mounting to state machine orchestration — alongside a team whose backgrounds span fintech, data science, and complex systems engineering. This is a hands-on engineering internship: you will ship real components of a production system, not shadow work.Tech stack: Python · LLM / Prompt Engineering · LangChain / LangGraph / OpenClaw · State Machines · API IntegrationPositionAI Agent Engineer (Student Intern)LocationHong Kong Science Park (on-site)Duration3 consecutive months, full-time (not less than 40 hours per week)EligibilityFull-time students of local or non-local post-secondary / tertiary institutions, aged 18+, legally permitted to work in Hong KongSalaryCompetitive monthly salary, subsidised under HKSTP SIP (details at offer stage)

Fullstack Developer (Agentic Development)

Duties • Participate in a team to design and layout of high-speed ICs for optical fiber/wireline communications, Design, verification, simulation and optimization for amplifier, ADC/ DAC, bandgap, analog buffer, LDO, charge pump, voltage reference, PLL, oscillator, SerDes,etc. Create support documents. Requirements • Bachelor degree or above in Electronic Engineering. • Knowledge of analog and mixed-signal circuit design. • Familiar with simulation tools such as SPICE, SPECTRE • Experienced in high-speed circuit design is a plus good programming in Perl, TCL and Shellprogramming is preferred. • Applicant with less experience will be considered as Junior Analog Design Engineer • Knowledge in CMOS IC physical layout design and able to use various EDA tools. • Good understanding of semiconductor theory and structures of devices.

Junior/ Senior Analog Design Engineer

About the RoleWe are developing next-generation NPUs and computing systems with large-model inference as a primary application, and are looking for a senior architect with technical depth and a systems perspective to drive hardware architecture innovation, frontier technology exploration, and validation of key technical solutions.This role is centered on hardware architecture and requires combined hardware/software knowledge and analytical capability — understanding the execution characteristics of large models, compilers, and runtimes, and translating them into design and optimization decisions across chips, memory, interconnect, and complete systems. Strong emphasis is also placed on performance, energy efficiency, cost efficiency, and engineering feasibility under domestic process and supply-chain conditions.We welcome technical experts with deep expertise in at least one of the following areas — NPU chips, high-speed interconnect, or complete systems — and with a cross-domain perspective.Key Responsibilities<ol><li>Hardware architecture exploration for large-model inference. Research NPU compute architecture, memory hierarchy, data movement, and interconnect mechanisms around the requirements of large-model inference, and propose innovative ideas, architecture improvements, and alternative solutions with product value.</li><li>Workload analysis and hardware-software co-design. Analyze the compute, memory-access, and communication characteristics of representative models in stages such as Prefill and Decode; combined with operator mapping, compiler scheduling, runtime, and communication libraries, identify hardware bottlenecks and optimize resource allocation and hardware-software interfaces.</li><li>Focused research on key hardware technologies. Based on individual expertise, lead research and solution design in one or more of the following directions:</li></ol><ul><li>NPU and SoC architecture: compute units, memory hierarchy, NoC, memory controllers, host interfaces, and related IP.</li><li>Advanced packaging and memory: chiplet, 2.5D/3D packaging, stacked memory, and die-to-die interconnect.</li><li>Boards and multi-card interconnect: PCIe accelerator cards, OAM modules, inter-card interconnect, system topology, and communication mechanisms.</li><li>Systems and supernodes: multi-accelerator servers, rack-scale systems, and supernodes, balancing compute, interconnect, power, cooling, and mechanical constraints.</li></ul><ol><li>Domestic process adaptation and engineering feasibility. Evaluate constraints such as die area, frequency, power, yield, and interface capabilities against the maturity of domestic wafer fabrication, memory, packaging, substrate, and IP capabilities, and explore architecture implementation paths suited to the domestic supply chain.</li><li>Performance and cost-efficiency optimization. Under target model, precision, and service-latency requirements, evaluate effective throughput, energy efficiency, and multi-card scaling efficiency; factoring in manufacturing, packaging, testing, memory, board, and system costs, optimize inference capability per unit cost and total cost of ownership (TCO).</li><li>Modeling, validation, and results delivery. Quantitatively compare the benefits and risks of candidate solutions through performance modeling, simulation, prototype verification, and sample testing; collaborate with chip, packaging, hardware, and software teams to move research outcomes into product design. Qualifications· Bachelor's degree or above in Microelectronics, Computer Science, Electronic Engineering, Communications, or a related field, with extensive hardware R&amp;D experience and experience in architecture design, technology research, or complex system development.· Chip direction: NPU or high-performance computing chips, with solid knowledge of compute units, memory hierarchy, on-chip interconnect, SoC integration, and related IP.· Hardware-software co-design knowledge that underpins hardware architecture design — understanding how models and operators are mapped to hardware through compilers and runtimes, and the ability to work with software teams to analyze performance issues and translate them into hardware requirements and design trade-offs.· A cross-layer systems perspective, able to understand the dependencies among chips, packaging, boards, interconnect, and complete systems. Expert-level depth in every direction is not required.· Understanding of domestic semiconductor process and supply-chain conditions, able to incorporate manufacturing, IP, packaging, and production constraints into solution evaluation.Preferred Qualifications· Architecture design experience with NPU chips or computing systems for large-model inference.· A proven track record of improving hardware utilization, inference performance, or deployment cost through hardware-software co-design.· Experience developing PCIe/OAM boards, multi-GPU servers, liquid-cooled racks, or supernodes.· Experience in joint development with foundries, packaging houses, IP vendors, or system manufacturers.The OpportunityThis role explores hardware innovation for next-generation NPU and computing systems grounded in the real-world needs of large-model inference, combining frontier technology with domestic engineering conditions to deliver product solutions with performance advantages, cost competitiveness, and mass-production viability. Specific research directions can be tailored to the candidate’s expertise.</li><li>· Experience in hardware performance modeling, system simulation, FPGA prototyping, or cost modeling.</li><li>· Project experience with chiplet, advanced packaging, stacked memory, UCIe, or multi-card high-speed interconnect.</li><li>· Experience in chip design, tape-out, mass production, or system productization based on domestic processes.</li><li>· Ability to conduct independent research on focused topics, track frontier technologies, propose new ideas, and validate technical judgments through modeling, data, and experiments.</li><li>· Strong cost awareness and engineering judgment, able to make sound trade-offs among performance, power, cost, development cycle, and supply-chain availability.</li><li>· Familiarity with the key characteristics of large-model inference, including Attention, MoE, low-precision computation, KV cache, Prefill/Decode, and model parallelism, and the ability to analyze their demands on compute, memory, and communication resources.</li><li>· Interconnect direction: high-speed SerDes, die-to-die, PCIe, dedicated inter-card interconnect, or RDMA networks, with an in-depth understanding of how topology, bandwidth, latency, and communication efficiency impact system performance.</li><li>· In-depth architecture design capability and hands-on project experience in at least one of the following areas:</li></ol>

Where Talent Meets Opportunity

AI R&D Lead